Spi Status Register (Spsr) 0Xf814 - Toshiba TMPR4925 Manual

17.4.5 SPI Status Register (SPSR)
31
15 14 13
TBSI RBSI TBS
R R R
1 0 000
Bits Mnemonic Field Name
⎯
31:16 Reserved
Transmit Buffer
15 TBSI
Status Indicator
14 RBSI Receive Buffer
Status Indicator
13:11 TBS Transmit Buffer
Status
10:8 RBS Receive Buffer
Status
SPI Overrun Error SPI Overrun Error (Initial value: 0, R/C)
7 SPOE
⎯
6:4 Reserved
Chapter 17 Serial Peripheral Interface
Reserved
11 10 8 7
RBS SPOE
R R/C
000 0
Transmit Buffer Status Indicator (Initial value: 1, R)
This bit indicates a transmit fill level interrupt.
0: Interrupt have been generated
1: Interrupt have not been generated
Receive Buffer Status Indicator (Initial value: 0, R)
This bit indicates a receive fill level interrupt.
0: Interrupt have been generated
1: Interrupt have not been generated
Transmit Buffer Status (Initial value: 000, R)
The field shows the status of the transmit buffer.
000: Transmit Buffer Empty
001: 1 transfer stored
010: 2 transfers stored
011: 3 transfers stored
100: 4 transfers stored, Buffer full
101 – 111: Not Available
Receive Buffer Status (Initial value: 000, R)
The field shows the status of the receive buffer.
000: Receive Buffer Empty
001: 1 transfer stored
010: 2 transfers stored
011: 3 transfers stored
100: 4 transfers stored, Buffer full
101 – 111: Not Available
This flag indicates that a value in the transmit buffer has been overwritten, before it
could be sent. It can be cleared by writing a "1" value to it. This flag will be cleared
by setting the module in configuration mode.
Read:
0: no error
1: Overrun error occurred
Write:
0: Don't care
1: Clear
Figure 17.4.5 SPI Status Register (SPSR) (1/2)
17-14
0xF814
6 4 3
Reserved IFSD SIDLE
R
0
Explanation
⎯
⎯
16
: Type
: Initial value
2 1 0
STRDY SRRDY
R R R : Type
1 1 0 : Initial value