Interrupt Level Register 5 (Irlvl5) 0Xf624 - Toshiba TMPR4925 Manual

15.4.9 Interrupt Level Register 5 (IRLVL5)
31
Reserved
15
Reserved
Bits Mnemonic Field Name
⎯
31:27 Reserved
26:24 IL27 Interrupt Level 27
⎯
23:19 Reserved
18:16 IL26 Interrupt Level 26
⎯
15:11 Reserved
10:8 IL11 Interrupt level 11
⎯
7:0 Reserved
27 26 24 23
IL27
R/W
000
11 10 8 7
IL11
R/W
000
Interrupt Level of INT[27] (Initial value: 000, R/W)
These bits specify the interrupt level of ACLCPME interrupts.
000: Interrupt level 0 (Interrupt disabled)
001: Interrupt level 1
010: Interrupt level 2
011: Interrupt level 3
100: Interrupt level 4
101: Interrupt level 5
110: Interrupt level 6
111: Interrupt level 7
Interrupt Level of INT[26] (Initial value: 000, R/W)
These bits specify the interrupt level of ACLC interrupts.
000: Interrupt level 0 (Interrupt disabled)
001: Interrupt level 1
010: Interrupt level 2
011: Interrupt level 3
100: Interrupt level 4
101: Interrupt level 5
110: Interrupt level 6
111: Interrupt level 7
Interrupt Level of INT[11] (Initial value: 000, R/W)
These bits specify the interrupt level of NAND Flash Controller interrupts.
000: Interrupt level 0 (Interrupt disabled)
001: Interrupt level 1
010: Interrupt level 2
011: Interrupt level 3
100: Interrupt level 4
101: Interrupt level 5
110: Interrupt level 6
111: Interrupt level 7
Figure 15.4.9 Interrupt Level Register 5
15-19
Chapter 15 Interrupt Controller
0xF624
19
Reserved
Reserved
Explanation
⎯
⎯
⎯
⎯
18 16
IL26
R/W : Type
000 : Initial value
0
: Type
: Initial value