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14.2 Configuration
Figure 14.2.1 illustrates the ACLC configuration.
DMAC
Data I/O Master
Slot-data
IM-bus
aclcimbif
Bus I/F
ACLC
Slave Register
Asynchronous Handshake
Slot Valid/Req &
Transfer
Register Access
Bitstream Receive & Transmit
AC-link
Figure 14.2.1 ACLC Module Configuration
14-2
Chapter 14 AC-link Controller
Wakeup
Control
System-side
(imclk/imreset* )
Link-side
(BITCLK/ACRESET* )
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