Pdmac G-Bus Address Register (Pdmga) 0Xd204 - Toshiba TMPR4925 Manual

10.4.62 PDMAC G-Bus Address Register (PDMGA)
31
15
Bits Mnemonic Field Name
31:2 PDMGA G-Bus Address
⎯
1:0 Reserved
PDMGA[31:16]
R/W
Undefined
PDMCA[15:2]
R/W
Undefined
PDMAC G-Bus Address (Initial value: undefined, R/W)
The G-Bus DMA transfer address is specified by a G-Bus physical address on a 32-bit
address boundary. This register value is used for G-Bus Read access during DMA
transfer from the G-Bus to the PCI Bus, or it is used for G-Bus Write access during
DMA transfer from the PCI Bus to the G-Bus.
This register value is held without being affected by a Reset.
Figure 10.4.62 PDMAC G-Bus Address Register
10-91
Chapter 10 PCI Controller
0xD204
2 1
Reserved
Description
⎯
16
: Type
: Initial value
0
: Type
: Initial value