Toshiba TMPR4925 Manual page 526

17.4.3 SPI Control Register 1 (SPCR1)
31
15
Bits Mnemonic Field Name
⎯
31:16 Reserved
15:8 SER SPI Data Rate
⎯
7:5 Reserved
4:0 SSZ SPI Transfer
Size
Note 1: This register could only be written, when the SPI module is in configuration mode.
Note 2: The SPICLK rate is shown in the table below in this time when MASTERCLK input is 40 MHz.
Reserved
8
SER
R/W
0x00
SPI Data Rate (Initial value: 0x00, R/W)
Control the bit-rate for the transmission.
The clock-rate on the SPI bus can be calculated using the following formula:
f = f /2 (n + 1)
BR SPI
But n = 0 is not available.
Refer to Note 2.
SPI Transfer size (Initial value: 00000b, R/W)
Select the number of bits to shift.
0x08: 8 bits
0x10: 16 bits
others: Reserved. Don't set these values.
SER[7:0]
00000001b
00000010b
00000011b
00000100b
00000101b
...
00001001b
...
00010011b
...
11111111b
Figure 17.4.3 SPI Control Register 1 (SPCR1)
17-12
Chapter 17 Serial Peripheral Interface
0xF808
7 5 4
Reserved
Explanation
⎯
⎯
SPI Clock Rate
10 MHz
6.667 MHz
5 MHz
4 MHz
3.33 MHz
2 MHz
1 MHz
78.125 KHz
16
: Type
: Initial value
0
SSZ
R/W : Type
00000 : Initial value