P2G Configuration Register (P2Gcfg) 0Xd090 - Toshiba TMPR4925 Manual

64-bit tx system risc tx49 family
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10.4.18 P2G Configuration Register (P2GCFG)
31
15
Bits
Mnemonic
Field Name
31:5
Reserved
4
Reserved
3
FTRD
Force Target
Retry/Disconnect
2
FTA
Force Target
Abort
1
TOBFR
Target read FIFO
Reset
0
TIBFR
Target write FIFO
Reset
Reserved
Reserved
Don't write one in this bit (Initial value: 0, R/W).
Force Target Retry/Disconnect (Initial value: 0, R/W)
The PCI Controller executes Retry Termination on a PCI Read access transaction if
this bit is set to "1". This is a diagnostic function.
Force Target Abort (Initial value: 0, R/W)
The PCI Controller executes a Target Abort on a PCI Read access transaction if this
bit is set to "1". This is a diagnostic function.
Target read FIFO Reset (Initial value: 0, R/W)
The PCI Controller flushes the CORE internal Target Out-Bound FIFO when "1" is
written to this bit. This bit always reads out "0" when it is read. This is a diagnostic
function.
Target write FIFO Reset (Initial value: 0, R/W)
The PCI Controller flushes the CORE internal Target In-Bound FIFO when "1" is
written to this bit. This bit always read out "0" when it is read. This is a diagnostic
function.
Figure 10.4.18 P2G Configuration Register
10-45
Chapter 10 PCI Controller
0xD090
5
4
3
2
FTRD
FTA TOBFR TIBFR
Reserved
R/W
R/W
R/W
R/W
0
0
0
Description
16
: Type
: Initial value
1
0
R/W : Type
0
0
: Initial value

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