Hi Interrupt Enable Register (Chiinte) 0Xa82C - Toshiba TMPR4925 Manual

64-bit tx system risc tx49 family
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16.4.13 HI Interrupt Enable Register (CHIINTE)
31
15
Reserved
Bits
Mnemonic
Field Name
31:8
Reserved
7
BUSIE
CHIBUSERROR
Interrupt Enable
6
05IE
CHI0_5
Interrupt Enable
5
10IE
CHI1_0
Interrupt Enable
4
DCIE
CHIDMACNT
Interrupt Enable
CHIININTA
3
INAIE
Interrupt Enable
2
INBIE
CHIININTB
Interrupt Enable
1
ACTIE
CHIACTINT
Interrupt Enable
0
ERRIE
CHIERRINT
Interrupt Enable
Figure 16.4.13 CHI Interrupt Enable Register (CHIINTE)
Reserved
8
7
6
BUSIE 05IE
CHIBUSERROR Interrupt Enable bits (Initial value: 0, R/W)
This bit is used to enable or disable the CHIBUSERROR Interrupt.
0: Disable
1: Enable
CHI0_5 Interrupt Enable bits (Initial value: 0, R/W)
This bit is used to enable or disable the CHI0_5 Interrupt.
0: Disable
1: Enable
CHI1_0 Interrupt Enable bits (Initial value: 0, R/W)
This bit is used to enable or disable the CHI1_0 Interrupt.
0: Disable
1: Enable
CHIDMACNT Interrupt Enable bits (Initial value: 0, R/W)
This bit is used to enable or disable the CHIDMACNT Interrupt.
0: Disable
1: Enable
CHIININTA Interrupt Enable bits (Initial value: 0, R/W)
This bit is used to enable or disable the CHIININTA Interrupt.
0: Disable
1: Enable
CHIININTB Interrupt Enable bits (Initial value: 0, R/W)
This bit is used to enable or disable the CHIININTB Interrupt.
0: Disable
1: Enable
CHIACTINT Interrupt Enable bits (Initial value: 0, R/W)
This bit is used to enable or disable the CHIACTINT Interrupt.
0: Disable
1: Enable
CHIERRINT Interrupt Enable bits (Initial value: 0, R/W)
This bit is used to enable or disable the CHIERRINT Interrupt.
0: Disable
1: Enable
16-33
Chapter 16 CHI Module
0xA82C
5
4
3
2
10IE
DCIE INAIE INBIE ACTIE ERRIE
R/W
00000000
Description
16
: Type
: Initial value
1
0
: Type
: Initial value

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