Chi Pointer Enable Register (Pntren) 0Xa804 - Toshiba TMPR4925 Manual

16.4.2 CHI Pointer Enable Register (PNTREN)
31 30 29 28
TB3E TB2E TB1E TB0E TA3E TA2E TA1E TA0E RB3E RB2E RB1E RB0E RA3E RA2E RA1E RA0E
R/W R/W R/W R/W
0 0 0 0
15
Bits Mnemonic Field Name
31 TB3E CHITXPTRB3EN
30 TB2E CHITXPTRB2EN
29 TB1E CHITXPTRB1EN
28 TB0E CHITXPTRB0EN
27 TA3E CHITXPTRA3EN
26 TA2E CHITXPTRA2EN
25 TA1E CHITXPTRA1EN
24 TA0E CHITXPTRA0EN
Figure 16.4.2 CHI Pointer Enable Register (PNTREN) (1/2)
27 26 25 24 23
R/W R/W R/W R/W R/W
0 0 0 0
Reserved
CHITXPTRB3EN bit (Initial value: 0, R/W)
This bit is used to enable/disable the timeslot for the transmit channel pointed to by
the TDM switch pointer CHITXPTRB3.
0: Disable
1: Enable
CHITXPTRB2EN bit (Initial value: 0, R/W)
This bit is used to enable/disable the timeslot for the transmit channel pointed to by
the TDM switch pointer CHITXPTRB2.
0: Disable
1: Enable
CHITXPTRB1EN bit (Initial value: 0, R/W)
This bit is used to enable/disable the timeslot for the transmit channel pointed to by
the TDM switch pointer CHITXPTRB1.
0: Disable
1: Enable
CHITXPTRB0EN bit (Initial value: 0, R/W)
This bit is used to enable/disable the timeslot for the transmit channel pointed to by
the TDM switch pointer CHITXPTRB0.
0: Disable
1: Enable
CHITXPTRA3EN bit (Initial value: 0, R/W)
This bit is used to enable/disable the timeslot for the transmit channel pointed to by
the TDM switch pointer CHITXPTRA3.
0: Disable
1: Enable
CHITXPTRA2EN bit (Initial value: 0, R/W)
This bit is used to enable/disable the timeslot for the transmit channel pointed to by
the TDM switch pointer CHITXPTRA2.
0: Disable
1: Enable
CHITXPTRA1EN bit (Initial value: 0, R/W)
This bit is used to enable/disable the timeslot for the transmit channel pointed to by
the TDM switch pointer CHITXPTRA1.
0: Disable
1: Enable
CHITXPTRA0EN bit (Initial value: 0, R/W)
This bit is used to enable/disable the timeslot for the transmit channel pointed to by
the TDM switch pointer CHITXPTAB0.
0: Disable
1: Enable
16-21
Chapter 16 CHI Module
0xA804
22 21 20 19
R/W R/W R/W R/W
0 0 0 0 0
Description
18 17 16
R/W R/W R/W : Type
0 0 0 : Initial value
0
: Type
: Initial value