Toshiba TMPR4925 Manual page 30

64-bit tx system risc tx49 family
Table of Contents

Advertisement

3.3.8
Thermal design
The failure rate of semiconductor devices is greatly increased as operating temperatures increase. As shown in
Figure 2, the internal thermal stress on a device is the sum of the ambient temperature and the temperature rise
due to power dissipation in the device. Therefore, to achieve optimum reliability, observe the following
precautions concerning thermal design:
(1) Keep the ambient temperature (Ta) as low as possible.
(2) If the device's dynamic power dissipation is relatively large, select the most appropriate circuit board
material, and consider the use of heat sinks or of forced air cooling. Such measures will help lower the
thermal resistance of the package.
(3) Derate the device's absolute maximum ratings to minimize thermal stress from power dissipation.
θja = θjc + θca
θja = (Tj–Ta) / P
θjc = (Tj–Tc) / P
θca = (Tc–Ta) / P
in which θja = thermal resistance between junction and surrounding air (°C/W)
θjc = thermal resistance between junction and package surface, or internal thermal
θca = thermal resistance between package surface and surrounding air, or external
Tj = junction temperature or chip temperature (°C)
Tc = package surface temperature or case temperature (°C)
Ta = ambient temperature (°C)
P = power dissipation (W)
3.3.9
Interfacing
When connecting inputs and outputs between devices, make sure input voltage (V
(V
/V
) levels are matched. Otherwise, the devices may malfunction. When connecting devices operating at
OL
OH
different supply voltages, such as in a dual-power-supply system, be aware that erroneous power-on and power-
off sequences can result in device breakdown. For details of how to interface particular devices, consult the
relevant technical datasheets and databooks. If you have any questions or doubts about interfacing, contact your
nearest Toshiba office or distributor.
3 General Safety Precautions and Usage Considerations
resistance (°C/W)
thermal resistance (°C/W)
θca
θjc
Figure 2 Thermal resistance of package
Ta
Tc
Tj
3-8
/V
) and output voltage
IL
IH

Advertisement

Table of Contents
loading

Table of Contents