Table of Contents
Advertisement
DMA Controller (DMAC)
0xB000
0xB004
0xB008
0xB00C
0xB010
0xB014
0xB018
0xB01C
0xB020
0xB024
0xB028
0xB02C
0xB030
0xB034
0xB038
0xB03C
0xB040
0xB044
0xB048
0xB04C
0xB050
0xB054
0xB058
0xB05C
0xB060
0xB064
0xB068
0xB06C
0xB070
0xB074
0xB078
0xB07C
0xB0A4
0xB0A8
NAND Flash Memory Controller (NDFMC)
0xC000
0xC004
0xC008
0xC00C
0xC010
0xC014
0xC018
Table 4.2.2 Internal Registers (2/8)
32
DMCHAR0
32
DMSAR0
32
DMDAR0
32
DMCNTR0
32
DMSAIR0
32
DMDAIR0
32
DMCCR0
32
DMCSR0
32
DMCHAR1
32
DMSAR1
32
DMDAR1
32
DMCNTR1
32
DMSAIR1
32
DMDAIR1
32
DMCCR1
32
DMCSR1
32
DMCHAR2
32
DMSAR2
32
DMDAR2
32
DMCNTR2
32
DMSAIR2
32
DMDAIR2
32
DMCCR2
32
DMCSR2
32
DMCHAR3
32
DMSAR3
32
DMDAR3
32
DMCNTR3
32
DMSAIR3
32
DMDAIR3
32
DMCCR3
32
DMCSR3
32
DMMFDR
32
DMMCR
32
NDFDTR
32
NDFMCR
32
NDFSR
32
NDFISR
32
NDFIMR
32
NDFSPR
32
NDFRSTR
4-5
Chapter 4 Address Mapping
DMA Chain Address Register 0
DMA Source Address Register 0
DMA Destination Address Register 0
DMA Count Register 0
DMA Source Address Increment Register 0
DMA Destination Address Increment Register 0
DMA Channel Control Register 0
DMA Channel Status Register 0
DMA Chain Address Register 1
DMA Source Address Register 1
DMA Destination Address Register 1
DMA Count Register 1
DMA Source Address Increment Register 1
DMA Destination Address Increment Register 1
DMA Channel Control Register 1
DMA Channel Status Register 1
DMA Chain Address Register 2
DMA Source Address Register 2
DMA Destination Address Register 2
DMA Count Register 2
DMA Source Address Increment Register 2
DMA Destination Address Increment Register 2
DMA Channel Control Register 2
DMA Channel Status Register 2
DMA Chain Address Register 3
DMA Source Address Register 3
DMA Destination Address Register 3
DMA Count Register 3
DMA Source Address Increment Register 3
DMA Destination Address Increment Register 3
DMA Channel Control Register 3
DMA Channel Status Register 3
DMA Memory Fill Data Register
DMA Master Control Register
NAND Flush Memory Data Transmit Register
NAND Flush Memory Mode Control Register
NAND Flush Memory Status Register
NAND Flush Memory Interrupt Status Register
NAND Flush Memory Interrupt Mask Register
NAND Flush Memory Strobe Plus width Register
NAND Flush Memory Reset Register
Advertisement
Table of Contents
