Toshiba TMPR4925 Manual page 225

SDCLK/SYSCLK
CS*
CE*
ADDR[19:0]
RAS*
CAS*
WE*
CKE
OE*/BUSSPRT*
DQM[7:0]
ff
DATA[31:0]
ACK*
ACE*
BWE*
DMAREQ[n]
DMAACK[n]
DMADONE*
Figure 8.5.21 Dual Address Transfer from SDRAM to External I/O Device
(4-word Burst Transfer from 32-bit SDRAM: Set DMCCRn.DBINH to "1")
f0
V V V V Valid
f
8-57
Chapter 8 DMA Controller
ff
Valid Valid
0 f 0 f 0
Valid
f 0 f