Toshiba TMPR4925 Manual page 247

Chapter 9 SDRAM Controller
SDCLK
SDCS*
ADDR [19:16]
SADDR10
0000 0400
ADDR[14:5]
RAS*
CAS*
WE*
CKE
DQM [3:0]
f c f
DATA [31:0]
ACK*/READY*
= 3, t = 1, 32-bit Bus)
Figure 9.5.4 One-Word Single Write (t
RCD DA
9-21