Toshiba TMPR4925 Manual page 134

64-bit tx system risc tx49 family
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Bits
Mnemonic
Field Name
26:24
PCM
PCMCIA 16-bit
PC Card Mode
23
PCS
PCMCIA Slot
Selection
22
Reserved
21:20
BSZ
Bus Width
19:18
PM
Page Mode
Page Size
17:16
PWT
Page Mode Wait
time
15:12
WT
Normal Mode
Wait Time
Figure 7.4.1 External Bus Channel Control Register (2/3)
Chapter 7 External Bus Controller
PCMCIA 16-bit PC Card Mode (Initial value: 000(ch0-6)/001(ch7), R/W)
Specifies the PCMCIA mode.
000 : PCMCIA Disabled for Channel.
001 : PCMCIA Common Memory Access Enabled for Channel.
010 : PCMCIA IO Access Enabled for Channel.
011 : PCMCIA Attribute Memory Access Enabled for Channel.
100, 101, 110, 111: Reserved
PCMCIA Slot Selection (Initial value: 0, R/W)
This bit select PCMCIA slot.
0 : Channel PCMCIA access is for Slot1.
1 : Channel PCMCIA access is for Slot2.
Note: This bit is always set "1" (Initial value: 1(ch0,7)/0(ch1-6), R/W).
The value of Boot signal ADDR[2] is set in the default value for bit 22 of Channel 0
and Channel 7. However, Boot signal ADDR[2] must be "1". If the default value for bit
22 of Cannel 0 and Channel 7 is "0", please confirm that Boot signal ADDR[2] is not
"0".
External Bus Control Bus Size (Initial value: A[13:12](ch0,7)/00(ch1~6), R/W)
Specifies the memory bus width.
00: Reserved
10: 16-bit width
01: 32-bit width
11: 8-bit width
External Bus Control Page Mode Page Size (Initial value: 00, R/W)
Specifies the Page mode (Page mode memory support) use and page size.
00: Normal mode
01: 4-page mode
10: 8-page mode
11: 16-page mode
External Bus Control Page Mode Wait Time (Initial value: 11(ch0,7)/00(ch1-6), R/W)
Specifies the wait cycle count during Burst access when in the Page mode.
00: 0 wait cycles
10: 2 wait cycles
01: 1 wait cycle
11: 3 wait cycles
Specifies a wait cycle count from 0 to 63 that matches WT when in the Normal mode
or Ready mode. (See the WT item.)
External Bus Control Normal Mode Wait Time
(Initial value: 1111(ch0,7)/0000(ch1~6), R/W)
Specifies the wait cycle count in the first cycle of a Single Cycle or Burst access.
Specifies the following wait cycle count when in the Page mode.
0000: 0 wait cycles 0100: 4 wait cycles 1000: 8 wait cycles
0001: 1 wait cycle
0101: 5 wait cycles 1001: 9 wait cycles
0010: 2 wait cycles 0110: 6 wait cycles 1010: 10 wait cycles
0011: 3 wait cycles 0111: 7 wait cycles 1011: 11 wait cycles
Specifies a wait cycle count from 0 to 63 that matches PWT when in a mode other
than the Page mode.
PWT[1:0]: WT[3:0]
000000: 0 wait cycles
010000: 16 wait cycles
000001: 1 wait cycle
010001: 17 wait cycles
:
001110: 14 wait cycles
011110: 30 wait cycles
001111: 15 wait cycles
011111: 31 wait cycles
Note 1: Set the WT wait cycle count to a value greater than the PWT Wait cycle count
when in the Page mode.
7-26
Description
1100: 12 wait cycles
1101: 13 wait cycles
1110: 14 wait cycles
1111: 15 wait cycles
110000: 48 wait cycles
110001: 49 wait cycles
:
:
111110: 62 wait cycles
111111: 63 wait cycles

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