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18.1
Characteristics.............................................................................................................................................. 18-1
18.2
Block Diagram ............................................................................................................................................. 18-1
18.3
Detailed Explanation.................................................................................................................................... 18-2
18.3.1
Access to NAND Flash Memory......................................................................................................... 18-2
18.3.2
ECC Control........................................................................................................................................ 18-4
18.4
Registers....................................................................................................................................................... 18-5
18.4.1
NAND Flash Memory Data Transfer Register (NDFDTR) 0xC000 ................................................... 18-5
18.4.2
NAND Flash Memory Mode Control Register (NDFMCR) 0xC004 ................................................. 18-6
18.4.3
NAND Flash Memory Status Register (NDFSR) 0xC008 .................................................................. 18-7
18.4.4
NAND Flash Memory Interrupt Status Register (NDFISR) 0xC00C ................................................. 18-8
18.4.5
NAND Flash Memory Interrupt Mask Register (NDFIMR) 0xC010 ................................................. 18-9
18.4.6
NAND Flash Memory Strobe Pulse Width Register (NDFSPR) 0xC014 ......................................... 18-10
18.4.7
NAND Flash Memory Reset Register (NDFRSTR) 0xC018.............................................................18-11
18.5
Timing Diagrams ....................................................................................................................................... 18-12
18.5.1
Command and Address Cycle ........................................................................................................... 18-12
18.5.2
Data Read Cycle................................................................................................................................ 18-13
18.5.3
Data Write Cycle ............................................................................................................................... 18-15
18.6
Example of Using NAND Flash Memory.................................................................................................. 18-16
19. Real Time Clock (RTC) ........................................................................................................................................ 19-1
19.1
Features ........................................................................................................................................................ 19-1
19.2
Block Diagrams ........................................................................................................................................... 19-2
19.3
Operations .................................................................................................................................................... 19-3
19.3.1
Operation............................................................................................................................................. 19-3
19.3.2
Interrupt............................................................................................................................................... 19-3
19.4
Registers....................................................................................................................................................... 19-3
19.4.1
RTC Register (High) (RTCHI) 0xF900 ............................................................................................... 19-4
19.4.2
RTC Register (Low) (RTCLO) 0xF904 .............................................................................................. 19-4
19.4.3
Alarm Register (High) (ALARMHI) 0xF908 ..................................................................................... 19-5
19.4.4
Alarm Register (Low) (ALARMLO) 0xF90C .................................................................................... 19-5
19.4.5
RTC Control Register (RTCCTRL) 0xF910 ....................................................................................... 19-6
19.4.6
RTC Interrupt Status Register (RTCINT) 0xF914............................................................................... 19-7
20. Removed ............................................................................................................................................................... 20-1
21. Extended EJTAG Interface ................................................................................................................................... 21-1
21.1
Extended EJTAG Interface .......................................................................................................................... 21-1
21.2
JTAG Boundary Scan Test .......................................................................................................................... 21-2
21.2.1
JTAG Controller and Register ............................................................................................................. 21-2
21.2.2
Instruction Register ............................................................................................................................. 21-3
21.2.3
Boundary Scan Register ...................................................................................................................... 21-3
21.2.4
Device ID Register .............................................................................................................................. 21-6
21.3
Initializing the Extended EJTAG Interface .................................................................................................. 21-7
22. Electrical Characteristics ...................................................................................................................................... 22-1
22.1
22.2
22.3
DC Characteristics ....................................................................................................................................... 22-2
22.3.1
DC Characteristics Except for PCI Interface....................................................................................... 22-2
22.3.2
DC Characteristics Except for PCI Interface....................................................................................... 22-3
22.4
Power Circuit for PLL.................................................................................................................................. 22-3
22.4.1
Recommended Circuit for PLL ........................................................................................................... 22-3
22.5
AC Characteristics ....................................................................................................................................... 22-4
22.5.1
MASTERCLK AC Characteristics...................................................................................................... 22-4
22.5.2
Power On AC Characteristics.............................................................................................................. 22-4
22.5.3
SDRAM Interface AC Characteristics................................................................................................. 22-5
22.5.4
External Bus Interface AC Characteristics .......................................................................................... 22-6
22.5.5
PCI Interface AC Characteristics (33 MHz)........................................................................................ 22-7
(*1)
................................................................................................................... 22-1
(*3)
.................................................................................................... 22-1
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