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SYSCLK
CE* (SRAM)
CE* (I/O device)
ADDR [19:0]
ACE*
OE*
BUSSPRT*
SWE*
BWE*
DATA [31:0]
ACK*
DMAREQ[n]
DMAACK[n]
DMADONE*
Figure 8.5.17 Dual Address Transfer from SRAM to External I/O Device
(4-word Burst Transfer from 32-bit Bus SRAM)
f
V
V
V
V
8-53
Chapter 8 DMA Controller
0
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0
f
0
f
Valid
Valid
Valid
Valid
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