Block Diagram - Toshiba TMPR4925 Manual

15.2 Block Diagram

TX49/H2 Core
Internal Timer
Interrupt Request
0
Interrupt
[7]
Request
1
(IP[7:2])
[6:2]
Non-maskable
Interrupt Request
TINTDIS
PCIC
Interrupt Controller
Detection Circuit
[7:2]
Set Interrupt Level
Set Interrupt Mask
Process Priority
Watchdog Timer Interrupt
Flag Register
Polarity Register
Mask Register
Interrupt Control Register
Figure 15.2.1 Interrupt Controller Outline
15-2
Chapter 15 Interrupt Controller
8
External Interrupt Signal (INT[7:0])
1
TX49 Write Time Out Error
1
NAND Flash Controller
2
SIO[1:0]
4
DMA[3:0]
1
PDMAC
1
PCIC
3
TMR[2:0]
1
SPI
1
RTC
1
ACLC
1
ACLCPME
1
CHI
1
PCIERR
1
PCIPME
1
Internal Interrupt Request
Non-maskable Interrupt Signal (NMI*)
External Interrupt Request
Internal
Interrupt
Signal
TMR2
REQ[1]*