Interrupt Detection Enable Register (Irden) 0Xf600 - Toshiba TMPR4925 Manual

15.4.1 Interrupt Detection Enable Register (IRDEN)
31
15
Bits Mnemonic Field Name
⎯
31:1 Reserved
0 IDE Interrupt
Detection Enable
Reserved
Reserved
Interrupt Detection Enable (Initial value: 0, R/W)
Enables interrupt detection.
0: Stop interrupt detection.
1: Start interrupt detection
Figure 15.4.1 Interrupt Detection Enable Register
15-9
Chapter 15 Interrupt Controller
0xF600
Explanation
⎯
16
: Type
: Initial value
1 0
IDE
R/W : Type
0 : Initial value