Channel Status Register (Csrn) - Toshiba TX39 Series User Manual

32bit risc microprocessor
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10.3.3 Channel status register (CSRn)

3 1
Act
R
0
1 5
Mnemonic
Name of Field
Bit
31
Act
Channel
active
23
NC
Normal
completion
Fig. 10-8
2 3
0
NC
R/W
0
0
Channel Active
Indicates that the channel is in the wait status.
1: Channel is in the wait status.
0: Channel is not in the wait status.
Normal Completion
Indicates that the channel operation has completed
normally. If interrupts at the time of a normal completion
are permitted in the CCR register, the DMAC requests an
interrupt when the NC bit becomes 1.
In the continue mode, the NC bit never becomes 1.
By writing "0" in the NC bit, it is cleared to 0. When an
interrupt has been requested by a normal completion, the
interrupt request shall be withdrawn when the NC bit
becomes 0.
If the Str bit is attempted to be set to 1 when the NC bit is
1, an error occurs. Please clear the NC bit to 0 when
starting the next transfer.
The writing-in of "1" shall be ignored.
1: Channel operation has completed normally.
0: Channel operation has not completed normally.
Channel Status Registers (CSRn) (1/3)
26
126
TMPR3904F Rev. 2.0
2 2
2 1
2 0
1 9
1 8
AbC
NCC
BES
BED
Conf
R/W
R/W
R
R
R
0
0
0
0
0
3
2
Description
1 7
1 6
00
: Type
: Initial
Value
0
BSW
R/W
: Type
000
: Initial
Value

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