Pdmac Count Register (Pdmctr) 0Xd20C - Toshiba TMPR4925 Manual

10.4.64 PDMAC Count Register (PDMCTR)
31
Reserved
15
Bits Mnemonic Field Name
⎯
31:24 Reserved
23:2 PDMCTR Transfer Byte
Count
⎯
1:0 Reserved
24 23
PDMCTR[15:2]
R/W
Undefined
PDMAC Transfer Count (Initial value: undefined, R/W)
Sets an uncoded 24-bit transfer byte count in 32-bit word units. Also, the setting of
this register must always be a multiple of the transfer size specified inside the PDMAC
Configuration Register. No data transfer is performed if a count of "0" is set.
This byte count value is calculated from the transferred byte size as the PDMAC
performs a DMA transfer.
This register value is held without being affected by a Reset.
Figure 10.4.64 PDMAC Count Register
10-93
Chapter 10 PCI Controller
0xD20C
PDMCTR[23:16]
R/W
Undefined
2
Description
⎯
⎯
16
: Type
: Initial value
1 0
Reserved
: Type
: Initial value