Toshiba TMPR4925 Manual page 85

Offset Address Register Size (bit) Register Symbol
Serial I/O (Channel 0)
0xF300
0xF304
0xF308
0xF30C
0xF310
0xF314
0xF318
0xF31C
0xF320
Serial I/O (Channel 1)
0xF400
0xF404
0xF408
0xF40C
0xF410
0xF414
0xF418
0xF41C
0xF420
Parallel I/O (PIO)
0xF500
0xF504
0xF508
0xF50C
Table 4.2.2 Internal Registers (6/8)
32 SILCR0
32 SIDICR0
32 SIDISR0
32 SISCISR0
32 SIFCR0
32 SIFLCR0
32 SIBGR0
32 SITFIFO0
32 SIRFIFO0
32 SILCR1
32 SIDICR1
32 SIDISR1
32 SISCISR1
32 SIFCR1
32 SIFLCR1
32 SIBGR1
32 SITFIFO1
32 SIRFIFO1
32 PIODO
32 PIODI
32 PIODIR
32 PIOOD
4-9
Chapter 4 Address Mapping
Register Name
Line Control Register 0
DMA/Interrupt Control Register 0
DMA/ Interrupt Status Register 0
Status Change Interrupt Status Register 0
FIFO Control Register 0
Flow Control Register 0
Baud Rate Control Register 0
Transmitter FIFO Register 0
Receiver FIFO Register 0
Line Control Register 1
DMA/Interrupt Control Register 1
DMA/ Interrupt Status Register 1
Status Change Interrupt Status Register 1
FIFO Control Register 1
Flow Control Register 1
Baud Rate Control Register 1
Transmitter FIFO Register 1
Receiver FIFO Register 1
Output Data Register
Input Data Register
Direction Control Register
Open Drain Control Register