Single Address Single Transfer From I/O To Memory (32-Bit Sram) - Toshiba TMPR4925 Manual

8.5.3

Single Address Single Transfer from I/O to Memory (32-bit SRAM)

SYSCLK
CE*
ADDR [19:0]
ACE*
OE*/BUSSPRT*
SWE*
BWE*
DATA [31:0]
ACK*
DMAREQ[n]
DMAACK[n]
DMADONE*
Figure 8.5.3 Single Address Single Transfer from I/O to Memory
1c040
f
00000100
(Single Write of 32-bit Data to 32-bit SRAM)
8-39
Chapter 8 DMA Controller
00140
0 f