Dma Master Control Register (Dmmcr) 0Xb0A8 - Toshiba TMPR4925 Manual

8.4.1 DMA Master Control Register (DMMCR)
This register controls the entire DMA Controller.
31 28
EIS[3:0]
R
0000
15 14 13
FIFVC FIFWP
R
000
Bits Mnemonic Field Name
Error Interrupt
31:28 EIS[3:0]
Status
27:24 DIS[3:0] Normal
Completion
Interrupt Status
⎯
23:20 Reserved
FIFO Valid Entry
19:14 FIFVC
Count
13:11 FIFWP FIFO Write
Pointer
FIFO Read
10:8 FIFRP
Pointer
7 RSFIF Reset FIFO
27 24
DIS[3:0]
R
0000
11 10 8
FIFRP
RSFIF
R R/W
000
Error Interrupt Status [3:0] (Initial value: 0x0, R)
These four bits indicate the error interrupt status of each channel. EIS[n] corresponds
to channel n.
1: There is an error interrupt in the corresponding channel.
0: There is no error interrupt in the corresponding channel.
Done Interrupt Status [3:0] (Initial value: 0x0, R)
These four bits indicate the transfer completion (transfer complete or chain ended)
interrupt status of each channel. DIS[n] corresponds to channel n.
1: There is a transfer completion interrupt in the corresponding channel.
0: There is no transfer completion interrupt in the corresponding channel.
FIFO Valid Entry Count (Initial value: 000000, R)
These read only bits indicate the byte count of data that were written to FIFO but not
read out from the FIFO.
FIFO Write Pointer (Initial value: 000, R)
These read only bits indicate the next write position in FIFO. This is a diagnostic
function.
FIFO Read Pointer (Initial value: 000, R)
These read only bits indicate the next read position in FIFO. This is a diagnostic
function.
Reset FIFO (Initial value: 0, R/W)
This bit is used for resetting FIFO. When this bit is set to "1", the FIFO read pointer,
FIFO write pointer and FIFO valid entry count are initialized to "0".
If an error occurs during DMA transfer, use this bit when data remains in the FIFO
(when the FIFO Valid entry Count Field is not "0") to initialize the FIFO.
Figure 8.4.1 DMA Master Control Register (1/2)
8-22
Chapter 8 DMA Controller
0xB0A8
23 20 19
Reserved
7 6 3
FIFUM[3:0]
R/W
0 0000
Description
⎯
16
FIFOVC
R : Type
000000 : Initial value
2 1 0
RRPT
Reserved MSTEN
R/W R/W : Type
0 0 : Initial value