Analog Watchdog; Table 85. Analog Watchdog Channel Selection; Figure 73. Timing Diagram; Figure 74. Analog Watchdog's Guarded Area - ST STM32F446 Series Reference Manual

Analog-to-digital converter (ADC)
13.3.8

Analog watchdog

The AWD analog watchdog status bit is set if the analog voltage converted by the ADC is
below a lower threshold or above a higher threshold. These thresholds are programmed in
the 12 least significant bits of the ADC_HTR and ADC_LTR 16-bit registers. An interrupt can
be enabled by using the AWDIE bit in the ADC_CR1 register.
The threshold value is independent of the alignment selected by the ALIGN bit in the
ADC_CR2 register. The analog voltage is compared to the lower and higher thresholds
before alignment.
Table 85
watchdog on one or more channels.
Channels guarded by the analog
None
All injected channels
362/1328

Figure 73. Timing diagram

shows how the ADC_CR1 register should be configured to enable the analog

Figure 74. Analog watchdog's guarded area

Table 85. Analog watchdog channel selection

watchdog
ADC_CR1 register control bits (x = don't care)
AWDSGL bit
x
0
RM0390 Rev 4
AWDEN bit JAWDEN bit
0
0
RM0390
0
1