Universal synchronous asynchronous receiver transmitter (USART)
–
–
–
–
–
–
•
Multiprocessor communication - enter into mute mode if address match does not occur
•
Wake up from mute mode (by idle line detection or address mark detection)
•
Two receiver wakeup modes: Address bit (MSB, 9
25.3
USART implementation
This section describes the full set of features implemented in USART1. Refer to
USART features
Hardware flow control for modem
Continuous communication using DMA
Multiprocessor communication
Synchronous mode
Smartcard mode
Single-wire half-duplex communication
IrDA SIR ENDEC block
LIN mode
USART data length
1. X = supported.
25.4
USART functional description
The interface is externally connected to another device by three pins (see
USART bidirectional communication requires a minimum of two pins: Receive Data In (RX)
and Transmit Data Out (TX):
RX: Receive Data Input is the serial data input. Oversampling techniques are used for data
recovery by discriminating between valid incoming data and noise.
TX: Transmit Data Output. When the transmitter is disabled, the output pin returns to its I/O
port configuration. When the transmitter is enabled and nothing is to be transmitted, the TX
pin is at high level. In single-wire and smartcard modes, this I/O is used to transmit and
receive the data (at USART level, data are then received on SW_RX).
796/1328
Receive data register full
Idle line received
Overrun error
Framing error
Noise error
Parity error
for the differences between USART instances.
USART modes/features
Table 145. USART features
USART1, USART2,
(1)
USART3, USART6
RM0390 Rev 4
th
bit), Idle line
UART4, UART5
X
X
X
X
X
X
X
X
8 or 9 bits
Figure
RM0390
Table 145:
X
X
X
-
-
X
X
X
279). Any
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