Universal synchronous asynchronous receiver transmitter (USART)
Table 150. Error calculation for programmed baud rates at f
Baud rate
S.No
Desired
1
1.2 KBps
2
2.4 KBps
3
9.6 KBps
4
19.2 KBps
5
38.4 KBps
6
57.6 KBps
7
115.2 KBps
115.108 KBps
8
230.4 KBps
231.884 KBps
9
460.8 KBps
457.143 KBps
10
921.6 KBps
941.176 KBps
11
2 MBps
12
3 MBps
1. The lower the CPU clock the lower the accuracy for a particular baud rate. The upper limit of the achievable baud rate can
be fixed with these data.
Table 151. Error calculation for programmed baud rates at f
Baud rate
S.No
Desired
1
2.4 KBps
2
9.6 KBps
3
19.2 KBps
19.185 KBps
4
57.6 KBps
57.554 KBps
5
115.2 KBps
115.942 KBps
6
230.4 KBps
228.571 KBps
7
460.8 KBps
470.588 KBps
812/1328
oversampling by 8
Oversampling by 8 (OVER8=1)
f
= 16 MHz
PCLK
Value
programmed
Actual
in the baud
rate register
1.2 KBps
1666.625
2.4 KBps
833.375
9.598 KBps
208.375
19.208 KBps
104.125
38.369 KBps
52.125
57.554 KBps
34.75
17.375
8.625
4.375
2.125
2000 KBps
1
NA
NA
oversampling by 16
Oversampling by 16 (OVER8=0)
f
= 8 MHz
PCLK
Value
programmed
Actual
in the baud
rate register
2.400 KBps
208.3125
9.604 KBps
52.0625
26.0625
8.6875
4.3125
2.1875
1.0625
PCLK
(1)
% Error =
(Calculated -
Desired) B.rate /
Desired B.rate
0
0
0.02
0.04
0.08
0.08
0.08
0.64
0.79
2.12
0
NA
(1)
% Error =
(Calculated -
Desired)B.Rate
/Desired B.Rate
0.00%
0.04%
0.08%
0.08%
0.64%
0.79%
2.12%
RM0390 Rev 4
= 16 MHz or f
PCLK
f
= 24 MHz
PCLK
Value
programmed
Actual
in the baud
rate register
1.2 KBps
2500
2.4 KBps
1250
9.6 KBps
312.5
19.2 KBps
156.25
38.4 KBps
78.125
57.554 KBps
52.125
115.385 KBps
26
230.769 KBps
13
461.538 KBps
6.5
923.077 KBps
3.25
2000 KBps
1.5
3000 KBps
1
= 8 MHz or f
PCLK
PCLK
f
= 16 MHz
PCLK
Value
programmed
Actual
in the baud
rate register
2.400 KBps
416.6875
9.598 KBps
104.1875
19.208 KBps
52.0625
57.554 KBps
17.3750
115.108 KBps
8.6875
231.884 KBps
4.3125
457.143 KBps
2.1875
RM0390
= 24 MHz,
% Error
0
0
0
0
0
0.08
0.16
0.16
0.16
0.16
0
0
= 16 MHz,
% Error
0.00%
0.02%
0.04%
0.08%
0.08%
0.64%
0.79%
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