ST STM32F446 Series Reference Manual page 150

Reset and clock control (RCC)
Bits 31:24 Reserved, must be kept at reset value.
Bit 23 SAI2EN: SAI2 clock enable
Bit 22 SAI1EN: SAI1 clock enable
Bits 21:19 Reserved, must be kept at reset value.
Bit 18 TIM11EN: TIM11 clock enable
Bit 17 TIM10EN: TIM10 clock enable
Bit 16 TIM9EN: TIM9 clock enable
Bit 15 Reserved, must be kept at reset value.
Bit 14 SYSCFGEN: System configuration controller clock enable
Bit 13 SPI4EN: SPI4 clock enable
Bit 12 SPI1EN: SPI1 clock enable
Bit 11 SDIOEN: SDIO clock enable
Bit 10 ADC3EN: ADC3 clock enable
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This bit is set and cleared by software.
0: SAI2 clock disabled
1: SAI2 clock enabled
This bit is set and cleared by software.
0: SAI1 clock disabled
1: SAI1 clock enabled
This bit is set and cleared by software.
0: TIM11 clock disabled
1: TIM11 clock enabled
This bit is set and cleared by software.
0: TIM10 clock disabled
1: TIM10 clock enabled
This bit is set and cleared by software.
0: TIM9 clock disabled
1: TIM9 clock enabled
This bit is set and cleared by software.
0: System configuration controller clock disabled
1: System configuration controller clock enabled
This bit is set and cleared by software.
0: SPI4 clock disabled
1: SPI4 clock enabled
This bit is set and cleared by software.
0: SPI1 clock disabled
1: SPI1 clock enabled
This bit is set and cleared by software.
0: SDIO module clock disabled
1: SDIO module clock enabled
This bit is set and cleared by software.
0: ADC3 clock disabled
1: ADC3 clock enabled
RM0390 Rev 4
RM0390