RM0390
25.6
USART registers
Refer to
The peripheral registers have to be accessed by half-words (16 bits) or words (32 bits).
25.6.1
Status register (USART_SR)
Address offset: 0x00
Reset value: 0x00C0 0000
31
30
29
Res.
Res.
Res.
Res.
15
14
13
Res.
Res.
Res.
Res.
Universal synchronous asynchronous receiver transmitter (USART)
Figure 303. USART interrupt mapping diagram
Section 1.1 on page 51
28
27
26
25
Res.
Res.
Res.
12
11
10
9
Res.
Res.
CTS
rc_w0
for a list of abbreviations used in register descriptions.
24
23
22
Res.
Res.
Res.
8
7
6
LBD
TXE
TC
RXNE
rc_w0
r
rc_w0
rc_w0
RM0390 Rev 4
21
20
19
18
Res.
Res.
Res.
Res.
5
4
3
2
IDLE
ORE
NF
r
r
r
17
16
Res.
Res.
1
0
FE
PE
r
r
835/1328
845
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