Figure 312. Txe/Rxne/Bsy Behavior In Master / Full-Duplex Mode (Bidimode=0, Rxonly=0) In The Case Of Continuous Transfers - ST STM32F446 Series Reference Manual

Advanced arm-based 32-bit mcus

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Serial peripheral interface/ inter-IC sound (SPI/I2S)

underflow error signal for slave operating in SPI mode, and that data from the slave are

always transacted and processed by the master even if the slave cannot not prepare them

correctly in time. It is preferable for the slave to use DMA, especially when data frames are

shorter and bus rate is high.

Each sequence must be encased by the NSS pulse in parallel with the multislave system to

select just one of the slaves for communication. In single slave systems, using NSS to

control the slave is not necessary. However, the NSS pulse can be used to synchronize the

slave with the beginning of each data transfer sequence. NSS can be managed either by

software or by hardware (see

Section 26.3.4: Multi-master

communication).

for a description of continuous transfers in master / full-

duplex and slave full-duplex mode.

Figure 312. TXE/RXNE/BSY behavior in master / full-duplex mode (BIDIMODE=0,

RXONLY=0) in the case of continuous transfers

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