RM0390
Bit 9 PTMSK: Mask of preamble type bits
This bit is set/reset by software
1: The preamble type bits are not copied into the SPDIFRX_DR, zeros are written instead
0: The preamble type bits are copied into the SPDIFRX_DR
Bit 8 CUMSK: Mask of channel status and user bits
This bit is set/reset by software
1: The channel status and user bits are not copied into the SPDIFRX_DR, zeros are written instead
0: The channel status and user bits are copied into the SPDIFRX_DR
Bit 7 VMSK: Mask of validity bit
This bit is set/reset by software
1: The validity bit is not copied into the SPDIFRX_DR, a zero is written instead
0: The validity bit is copied into the SPDIFRX_DR
Bit 6 PMSK: Mask parity error bit
This bit is set/reset by software
1: The parity error bit is not copied into the SPDIFRX_DR, a zero is written instead
0: The parity error bit is copied into the SPDIFRX_DR
Bits 5:4 DRFMT[1:0]: RX data format
This bit is set/reset by software
0b11: reserved
0b10: Data sample are packed by setting two 16-bit sample into a 32-bit word
0b01: Data samples are aligned in the left (MSB)
0b00: Data samples are aligned in the right (LSB)
Bit 3 RXSTEO: Stereo mode
This bit is set/reset by software
1: The peripheral is in STEREO mode
0: The peripheral is in MONO mode
This bit is used in case of overrun situation in order to handle misalignment
Bit 2 RXDMAEN: Receiver DMA enable for data flow
This bit is set/reset by software
1: DMA mode is enabled for reception.
0: DMA mode is disabled for reception.
When this bit is set, the DMA request is made whenever the RXNE flag is set.
Bits 1:0 SPDIFRXEN[1:0]: Peripheral block enable
This field is modified by software.
It shall be used to change the peripheral phase among the three possible states: STATE_IDLE,
STATE_SYNC and STATE_RCV.
0b00: Disable SPDIFRX (STATE_IDLE).
0b01: Enable SPDIFRX Synchronization only
0b10: Reserved
0b11: Enable SPDIF Receiver
Note: it is not possible to transition from STATE_RCV to STATE_SYNC, the user shall first go the
STATE_IDLE.
it is possible to transition from STATE_IDLE to STATE_RCV: in that case the peripheral
transitions from STATE_IDLE to STATE_SYNC and as soon as the synchronization is
performed goes to STATE_RCV.
1.
Refer to
Section 27.3.12: Register protection
(1)
(1)
(1)
(1)
(1)
(1)
(1)
for additional information on fields properties.
RM0390 Rev 4
SPDIF receiver interface (SPDIFRX)
(1)
919/1328
929
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