ST STM32F446 Series Reference Manual page 175

RM0390
Addr. Register
offset name
Reserved
0x78
Reset value
Reserved
0x7C
Reset value
RCC_SS
CGR
0x80
Reset value 0
RCC_PLLI2
SCFGR
0x84
Reset value
RCC_PLL
SAI
0x88
CFGR
Reset value
RCC_DCK
CFGR
0x8C
Reset value
RCC_CK
GATENR
0x90
Reset value
RCC_DCK
CFGR2
0x94
Reset value
Refer to
boundary addresses.
Table 21. RCC register map and reset values (continued)
0 0 0 0 0 0
PLLI2SR PLLI2SQ
[2:0] [3:0]
0 1 0 0 1 0 0
PLLSAIR PLLSAIQ
[2:0] [3:0]
0 1 0 0 1 0 0
0 0 0 0 0 0
FMP
I2C1
SEL
[1:0]
0 0 0 0 0
Section 2.2.2: Memory map and register boundary addresses
INCSTEP
0 0 0 0 0 0 0 0
PLLI
2SP
[1:0]
0 0
0 0
0 0 0
0
RM0390 Rev 4
Reset and clock control (RCC)
MODPER
0 0 0 0 0 0 0 0
PLLI2SN[8:0]
0 1 1 0 0 0 0 0
PLLSAIN[8:0]
0 1 1 0 0 0 0 0
PLLSAIDIVQ
[4:0]
0 0 0 0 0
for the register
0 0 0 0 0 0 0
PLLI2SM[5:0]
0 0 1 0 0 0 0
PLLSAIM[5:0]
0 0 0 0 0 0 0
PLLI2SDIVQ
[4:0]
0 0 0 0 0
0 0 0 0 0 0 0
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