Figure 348. Spdifrx States - ST STM32F446 Series Reference Manual

Advanced arm-based 32-bit mcus
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RM0390
When SPDIFRX is in STATE_IDLE:
The software can transition to STATE_SYNC by setting SPDIFRXEN to 0b01 or 0b11
When SPDIFRX is in STATE_SYNC:
If the synchronization fails or if the received data are not properly decoded with no
chance of recovery without a re-synchronization (FERR or SERR or TERR = 1), the
SPDIFRX goes to STATE_STOP, and waits for software acknowledge.
When the synchronization phase is completed, if SPDIFRXEN = 0b01 the peripheral
remains in this state.
At any time the software can set SPDIFRXEN to 0, then SPDIFRX returns immediately
to STATE_IDLE. If a DMA transfer is on-going, it will be properly completed.
The SPDIFRX goes to STATE_RCV if SPDIFRXEN = 0b11 and if the SYNCD = 1
When SPDIFRX is in STATE_RCV:
If the received data are not properly decoded with no chance of recovery without a re-
synchronization (FERR or SERR or TERR = 1), the SPDIFRX goes to STATE_STOP,
and waits for software acknowledge.
At any time the software can set SPDIFRXEN to 0, then SPDIFRX returns immediately
to STATE_IDLE. If a DMA transfer is on-going, it will properly be completed.
When SPDIFRX is in STATE_STOP:
The SPDIFRX stops reception and synchronization, and waits for the software to set
the bit SPDIFRXEN to 0, in order to clear the error flags.

Figure 348. SPDIFRX States

RM0390 Rev 4
SPDIF receiver interface (SPDIFRX)
907/1328
929

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