Adc Watchdog Lower Threshold Register (Adc_Ltr); Adc Regular Sequence Register 1 (Adc_Sqr1) - ST STM32F446 Series Reference Manual

Analog-to-digital converter (ADC)
Note: The software can write to these registers when an ADC conversion is ongoing. The
programmed value will be effective when the next conversion is complete. Writing to this
register is performed with a write delay that can create uncertainty on the effective time at
which the new value is programmed.
13.13.8

ADC watchdog lower threshold register (ADC_LTR)

Address offset: 0x28
Reset value: 0x0000 0000
31 30 29 28
Res. Res. Res. Res.
15 14 13 12
Res. Res. Res. Res.
Bits 31:12 Reserved, must be kept at reset value.
Bits 11:0 LT[11:0]: Analog watchdog lower threshold
These bits are written by software to define the lower threshold for the analog watchdog.
Note: The software can write to these registers when an ADC conversion is ongoing. The
programmed value will be effective when the next conversion is complete. Writing to this
register is performed with a write delay that can create uncertainty on the effective time at
which the new value is programmed.
13.13.9

ADC regular sequence register 1 (ADC_SQR1)

Address offset: 0x2C
Reset value: 0x0000 0000
31 30 29
Res. Res. Res. Res.
15 14 13
SQ16_0 SQ15[4:0]
rw rw rw
390/1328
27 26 25
Res. Res. Res.
11 10 9
rw rw rw
28 27 26 25
Res. Res. Res.
12 11 10 9
rw rw rw rw
24 23 22
Res. Res. Res. Res.
8 7 6
LT[11:0]
rw rw rw
24 23 22
Res. L[3:0]
rw rw
8 7 6
SQ14[4:0]
rw rw rw
RM0390 Rev 4
21 20 19 18
Res. Res. Res.
5 4 3 2
rw rw rw rw
21 20 19 18
SQ16[4:1]
rw rw rw rw
5 4 3 2
SQ13[4:0]
rw rw rw rw
RM0390
17 16
Res. Res.
1 0
rw rw
17 16
rw rw
1 0
rw rw