Flexible memory controller (FMC)
Bit number
31:30
29:28
27:24
23:20
19:16
15:8
7:4
3:0
Mode 2/B - NOR Flash
268/1328
Table 58. FMC_BWTRx bit fields
Bit name
Reserved
0x0
ACCMOD
0x0
DATLAT
Don't care
CLKDIV
Don't care
BUSTURN
Time between NEx high to NEx low (BUSTURN HCLK).
Duration of the second access phase (DATAST HCLK cycles) for write
DATAST
accesses.
ADDHLD
Don't care
Duration of the first access phase (ADDSET HCLK cycles) for write
accesses.
ADDSET
Minimum value for ADDSET is 0.
Figure 38. Mode2 and mode B read access waveforms
RM0390 Rev 4
Value to set
RM0390
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