Power controller (PWR)
Bits 31:20 Reserved, must be kept at reset value.
Bits 19:18 UDRDY[1:0]: Under-drive ready flag
These bits are set by hardware when MCU entered stop Under-drive mode and exited.
When the under-drive mode is enabled, these bits are not set as long as the MCU has not
entered stop mode yet. They are cleared by programming them to 1.
00: Under-drive is disabled
01: Reserved
10: Reserved
11:Under-drive mode is activated in Stop mode.
Bit 17 ODSWRDY: Over-drive mode switching ready
0: Over-drive mode is not active.
1: Over-drive mode is active on digital area on 1.2 V domain
Bit 16 ODRDY: Over-drive mode ready
0: Over-drive mode not ready.
1: Over-drive mode ready
Bit 14 VOSRDY: Regulator voltage scaling output selection ready bit
0: Not ready
1: Ready
Bits 13:10 Reserved, must be kept at reset value.
Bit 9 BRE: Backup regulator enable
When set, the Backup regulator (used to maintain backup SRAM content in Standby and
V
SRAM can still be used but its content will be lost in the Standby and V
the application must wait that the Backup Regulator Ready flag (BRR) is set to indicate that
the data written into the RAM will be maintained in the Standby and V
0: Backup regulator disabled
1: Backup regulator enabled
Note: This bit is not reset when the device wakes up from Standby mode, by a system reset,
Bit 8 EWUP1: Enable WKUP1 pin
This bit is set and cleared by software.
0: WKUP1 pin is used for general purpose I/O. An event on the WKUP1 pin does not
wakeup the device from Standby mode.
1: WKUP1 pin is used for wakeup from Standby mode and forced in input pull down
configuration (rising edge on WKUP1 pin wakes-up the system from Standby mode).
Note: This bit is reset by a system reset.
Bit 7 EWUP2: Enable WKUP2 pin
This bit is set and cleared by software
0: WKUP2 pin is used for general purpose I/O. An event on the WKUP2 pin does not
wakeup the device from Standby mode.
1: WKUP2 pin is used for wakeup from Standby mode and forced in input pull down
configuration (rising edge on WKUP2 pin wakes-up the system from Standby mode).
Note: This bit is reset by a system reset.
Bits 7:4 Reserved, must be kept at reset value.
114/1328
modes) is enabled. If BRE is reset, the backup regulator is switched off. The backup
BAT
or by a power reset.
RM0390 Rev 4
RM0390
modes. Once set,
BAT
modes.
BAT
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