ST STM32F446 Series Reference Manual page 498

Advanced-control timers (TIM1&TIM8)
Bits 11:8 ETF[3:0]: External trigger filter
This bit-field then defines the frequency used to sample ETRP signal and the length of the
digital filter applied to ETRP. The digital filter is made of an event counter in which N
consecutive events are needed to validate a transition on the output:
0000: No filter, sampling is done at f
0001: f
0010: f
0011: f
0100: f
0101: f
0110: f
0111: f
1000: f
1001: f
1010: f
1011: f
1100: f
1101: f
1110: f
1111: f
Bit 7 MSM: Master/slave mode
0: No action
1: The effect of an event on the trigger input (TRGI) is delayed to allow a perfect
synchronization between the current timer and its slaves (through TRGO). It is useful if we
want to synchronize several timers on a single external event.
Bits 6:4 TS[2:0]: Trigger selection
This bit-field selects the trigger input to be used to synchronize the counter.
000: Internal Trigger 0 (ITR0)
001: Internal Trigger 1 (ITR1)
010: Internal Trigger 2 (ITR2)
011: Internal Trigger 3 (ITR3)
100: TI1 Edge Detector (TI1F_ED)
101: Filtered Timer Input 1 (TI1FP1)
110: Filtered Timer Input 2 (TI2FP2)
111: External Trigger input (ETRF)
See
Timer.
Note: These bits must be changed only when they are not used (e.g. when SMS=000) to
Bit 3 Reserved, must be kept at reset value.
498/1328
=f , N=2
SAMPLING CK_INT
=f , N=4
SAMPLING CK_INT
=f , N=8
SAMPLING CK_INT
=f /2, N=6
SAMPLING DTS
=f /2, N=8
SAMPLING DTS
=f /4, N=6
SAMPLING DTS
=f /4, N=8
SAMPLING DTS
=f /8, N=6
SAMPLING DTS
=f /8, N=8
SAMPLING DTS
=f /16, N=5
SAMPLING DTS
=f /16, N=6
SAMPLING DTS
=f /16, N=8
SAMPLING DTS
=f /32, N=5
SAMPLING DTS
=f /32, N=6
SAMPLING DTS
=f /32, N=8
SAMPLING DTS
Table 108: TIMx Internal trigger connection
avoid wrong edge detections at the transition.
DTS
for more details on ITRx meaning for each
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