Spdifrx Interface Register Map; Table 170. Spdifrx Interface Register Map And Reset Values - ST STM32F446 Series Reference Manual

RM0390
27.5.10

SPDIFRX interface register map

Table 170

Table 170. SPDIFRX interface register map and reset values

Register
Offset
name
SPDIFRX_CR
0x00
Reset value
SPDIFRX_IMR
0x04
Reset value
SPDIFRX_SR
0x08
Reset value
SPDIFRX_
IFCR
0x0C
Reset value
SPDIFRX_DR
0x10
Reset value 0
SPDIFRX_
FMT1_DR
0x10
Reset value 0
SPDIFRX_
FMT2_DR
0x10
Reset value 0
SPDIFRX_
CSR
0x14
Reset value
SPDIFRX_DIR
0x18
Reset value
Refer to
gives the SPDIFRX interface register map and reset values.
WIDTH5[14:0]
0 0 0 0 0 0 0 0
P
C U V
E
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
DRNL2[15:0]
0 0 0 0 0 0 0 0
0 0
TLO[12:0]
0 0 0 0 0 0
Section 2.2.2 on page 56
0 0 0 0
0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
DR[23:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
CS[7:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0
for the register boundary addresses.
RM0390 Rev 4
SPDIF receiver interface (SPDIFRX)
0 0 0 0 0 0 0 0
0
0 0 0
DR[23:0]
0 0 0 0 0 0 0 0
Res.
0 0 0 0 0 0 0 0
DRNL1[15:0]
0 0 0 0 0 0 0 0
USR[15:0]
0 0 0 0 0 0 0 0
THI[12:0]
0 0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0
0 0 0 0 0 0
P
C U V
E
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
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