Spdifrx Decoder (Spdifrx_Dc); Figure 342. Channel Coding Example - ST STM32F446 Series Reference Manual

Advanced arm-based 32-bit mcus
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SPDIF receiver interface (SPDIFRX)
Coding of information bits
In order to minimize the DC component value on the transmission line, and to facilitate clock
recovery from the data stream, bits 4 to 31 are encoded in biphase-mark.
Each bit to be transmitted is represented by a symbol comprising two consecutive binary
states. The first state of a symbol is always different from the second state of the previous
symbol. The second state of the symbol is identical to the first if the bit to be transmitted is
logical 0. However, it is different if the bit is logical 1. These states are named "UI" (Unit
Interval) in the IEC-60958 specification.
The 24 data bits are transferred LSB first.
27.3.2

SPDIFRX decoder (SPDIFRX_DC)

Main principle
The technique used by the SPDIFRX in order to decode the S/PDIF stream is based on the
measurement of the time interval between two consecutive edges. Three kinds of time
intervals may be found into an S/PDIF stream:
The long time interval, having a duration of 3 x UI, noted TL. It appears only during
preambles.
The medium time interval, having a duration of 2 x UI, noted TM. It appears both in
some preambles or into the information field.
The short time interval, having a duration of 1 x UI, noted TS. It appears both in some
preambles or into the information field.
The SPDIFRX_DC block is responsible of the decoding of the received S/PDIF stream. It
takes care of the following functions:
Resampling and filtering of the incoming signal
Estimation of the time-intervals
Estimation of the symbol rate and synchronization
Decoding of the serial data, and check of integrity
Detection of the block, and sub-frame preambles
Continuous tracking of the symbol rate
900/1328

Figure 342. Channel coding example

RM0390 Rev 4
RM0390

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