Keithley 4200-SCS Reference Manual page 1688

Semiconductor characterization system
Hide thumbs Also See for 4200-SCS:
Table of Contents

Advertisement

Appendix O: Advanced Applications
Figure O-18
"diode" moved to top of Project Navigator
Execute the test sequence (Subsite Plan)
To select the Subsite Plan, click "subsite" in the Project Navigator. The Subsite Plan name will
appear in the execution indicator box as shown in
To execute the Subsite Plan, click the green Run button. The first test for each device will control
the switch matrix, which connects the device to the instrumentation. The switch matrix was added
in the previous application
While each test is running, the test name will appear in the execution indicator box. After the last
test vt is executed, the testing process will stop.
Figure O-19
Execution indicator box
Customizing a user test module (UTM)
This tutorial demonstrates how to modify a user module using KULT. In the ivswitch project, there
is a test named rdson. The rdson test measures the drain-to-source resistance of a saturated N-
channel MOSFET as follows:
1.
Applies 2 V to the gate (Vg) to saturate the MOSFET.
2.
Applies 3 V to the drain (Vd1) and performs a current measurement (Id1).
3.
Applies 5 V to the drain (Vd2) and performs another current measurement (Id2).
4.
Calculates the drain-to-source resistance rdson as follows:
rdson = (Vd2-Vd1) / (Id2-Id1)
O-12
Controlling a switch matrix on page
Return to
Section Topics
Model 4200-SCS Reference Manual
Figure
O-19.
O-2.
4200-901-01 Rev. S / May 2017

Advertisement

Table of Contents
loading

Table of Contents