Keithley 4200-SCS Reference Manual page 1647

Model 4200-SCS Reference Manual
NBTI_1_DUT project plan
The NBTI_1_DUT project plan is shown in
(NBTI) is configured for subsite cycling using voltage stressing. However, the device is a
p-channel MOSFET (PMOS).
This project plan includes initialization and termination steps (UTMs) to control the temperature of
the chuck. The subsite plan will not start until the chuck reaches the specified temperature. After
the first pre-stress cycle to perform characterization tests, subsequent cycles voltage stress the
device for a specified period before repeating the tests. The Device Stress Properties setup
window for the NBTI_1_DUT project is shown in
After the subsite plan is completed, the UTM for the termination step cools the chuck.
In a parallel connection scheme, up to 20 devices can be stressed by voltage.
an example of twenty parallel-connected devices being stressed by eight gate and drain voltages.
Figure M-4
NBTI_1_DUT project plan
Figure M-5
Device Stress Properties window – NBTI_1_DUT project
4200-901-01 Rev. S / May 2017
Figure
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M-4. As with the HCI projects, the subsite plan
Figure M-5.
Appendix M: WLR Testing
Figure M-3 shows
M-5