Keithley 4200-SCS Reference Manual page 1644

Appendix M: WLR Testing
Introduction
This appendix provides information on WLR testing. Included are tests for HCI, NBTI,
Electromigration, and Qbd. Also included is background information on HCI degradation and
summaries for using 4200-SCS Project Plans to measure HCI degradation and other WLR tests.
NOTE:
JEDEC standards
NOTE:
JESD28-A
Published: Dec-2001
A PROCEDURE FOR MEASURING N-CHANNEL MOSFET HOT-CARRIER-INDUCED
DEGRADATION UNDER DC STRESS:
This document describes an accelerated test for measuring the hot-carrier-induced degradation of a
single n-channel MOSFET using dc bias. The purpose of this document is to specify a minimum set
of measurements so that valid comparisons can be made between different technologies, IC
processes, and process variations in a simple, consistent, and controlled way. The measurements
specified should be viewed as a starting point in the characterization and benchmarking of the
transistor manufacturing process.
JESD35-A
Published: Apr-2001
PROCEDURE FOR WAFER-LEVEL-TESTING OF THIN DIELECTRICS:
The revised JESD35 is intended for use in the MOS Integrated Circuit manufacturing industry. It
describes procedures developed for estimating the overall integrity and reliability of thin gate oxides.
Three basic test procedures are described: the Voltage-Ramp (V-Ramp), the Current-Ramp (J-Ramp,)
and the new Constant Current (Bounded J-Ramp) test. Each test is designed for simplicity, speed, and
ease of use. The standard has been updated to include breakdown criteria that are more robust in
detecting breakdown in thinner gate oxides that may not experience hard thermal breakdown.
NOTE:
When you visit the JEDEC website, you must first register before you can access the standards.
Registration is free.
M-2
The Project Plans for HCI and Qbd testing comply with the standard procedures
established by JEDEC. In this appendix, all references to the JEDEC standards
and duplicated JEDEC documentation are clearly indicated as JEDEC copyright
protected material.
The following descriptions for the JESD28-A and JESD35-A standard procedures
have been acquired from the JEDEC website. This is JEDEC copyright-protected
material.
The JEDEC standard procedures are available on the JEDEC website at the
following address: http://www.jedec.org
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Model 4200-SCS Reference Manual
Appendix M
WLR Testing
4200-901-01 Rev. S / May 2017