Sleep Mode; Low-Power Sleep Mode (Lp Sleep); Table 25. Sleep - ST STM32L4 5 Series Reference Manual

Advanced arm-based 32-bit mcus
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RM0351
or a RTC event occurs (see
After waking up from Standby or Shutdown mode, program execution restarts in the same
way as after a Reset (boot pin sampling, option bytes loading, reset vector is fetched, etc.).
5.3.4

Sleep mode

I/O states in Sleep mode
In Sleep mode, all I/O pins keep the same state as in Run mode.
Entering the Sleep mode
The Sleep mode is entered according
SLEEPDEEP bit in the Cortex
Refer to
Exiting the Sleep mode
The Sleep mode is exit according Section : Exiting low power mode.
Refer to
Sleep-now mode
Mode entry
Mode exit
Wakeup latency
5.3.5

Low-power sleep mode (LP sleep)

Please refer to the product datasheet for more details on voltage regulator and peripherals
operating conditions.
Figure 374: RTC block
®
Table 25: Sleep
for details on how to enter the Sleep mode.
Table 25: Sleep
for more details on how to exit the Sleep mode.
WFI (Wait for Interrupt) or WFE (Wait for Event) while:
– SLEEPDEEP = 0
– No interrupt (for WFI) or event (for WFE) is pending
Refer to the Cortex
On return from ISR while:
– SLEEPDEEP = 0 and
– SLEEPONEXIT = 1
– No interrupt is pending
Refer to the Cortex
If WFI or return from ISR was used for entry
Interrupt: refer to
If WFE was used for entry and SEVONPEND = 0:
Wakeup event: refer to
If WFE was used for entry and SEVONPEND = 1:
Interrupt even when disabled in NVIC: refer to
STM32L4x5/STM32L4x6 vector table
Section 14.3.2: Wakeup event management
None
diagrams).
Section : Entering low power
-M4 System Control register is clear.

Table 25. Sleep

®
-M4 System Control register.
®
-M4 System Control register.
Table 57: STM32L4x5/STM32L4x6 vector table
Section 14.3.2: Wakeup event management
DocID024597 Rev 5
Power control (PWR)
mode, when the
Description
Table 57:
or Wakeup event: refer to
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