Intel ® Quickpath Interconnect (Qpi); Table 4. Intel ® Xeon ® Processor 5500 Series Feature Set Overview - Intel E42249-003 Product Specification

Functional Architecture
Table 4. Intel
Feature
Cache Sizes
Data Transfer Rate
Multi-Core Support
Dual Processor Support
Package
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The Intel Server Board S5500BC supports Intel
Thermal Design Power (TDP) or less and with a maximum data transfer rate of 6.4 GT/s.
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3.1.1 Intel
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Intel QuickPath Interconnect (QPI) is a cache-coherent, link-based interconnect specification
developed by Intel to connect processor, chipset and I/O bridge components. The Intel
5500 chipset is the first dual-processor server/workstation platform to implement Intel
QuickPath Interconnect links. Figure 6 provides a platform overview of the Intel
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chipset with Intel QuickPath Interconnect implementation.
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The Intel IOH 5500 chipset supports up to two processor sockets, with up to four cores per
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socket. With Intel QuickPath Interconnect, caching agents are responsible for participating in
the cache coherence protocol, and home agents are responsible for managing access to the
memory regions they control. Since the Intel
integrated memory controller, the home agents and caching agents reside within the processor
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sockets. The Intel QuickPath Interconnect link blocks include the Intel
Physical through Protocol layers, which are implemented in hardware. No special software or
drivers are required, other than firmware to initialize the Intel
load routing information.
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Each the Intel Xeon
I/O Hub (IOH) chipset through dedicated Intel
QuickPath Interconnect link is a serial point-to-point connection, with 20 lanes per link under full
width operation. These links are the only mode of data exchange between the processors and
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Intel IOH chipset. There are no sideband signals. The Intel
communication fabric is glueless and does not require special hardware to interface to the
processors to maintain cache coherency.
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Xeon Processor 5500 Series Feature Set Overview
QuickPath Interconnect (QPI)
processor 5500 series is connected to the other processor and the Intel
Intel order number: E42249-003
Intel
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Intel Xeon
Instruction Cache = 32 KB
Data Cache = 32 KB
8 MB shared among cores (up to 4)
Two full-width Intel
up to 6.4 GT/s in each direction.
Up to four cores per processor.
Up to two processors per platform.
1366-land FCLGA
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Xeon processor 5500 series with 95 W
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Xeon processor 5500 series contains an
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QuickPath Interconnect links and
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QuickPath Interconnect links. Each Intel
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QuickPath Interconnect
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Server Board S5500BC TPS
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Processor 5500 Series
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QuickPath Interconnect links,
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IOH 5500
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QuickPath Interconnect
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Revision 1.0
IOH
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