Figure 381. Normal Bulk/Control Out/Setup And Bulk/Control In Transactions - Dma - ST STM32F207 Series Reference Manual

Advanced arm-based 32-bit mcus
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RM0033
c)
d)
e)
f)
g)
h)

Figure 381. Normal bulk/control OUT/SETUP and bulk/control IN transactions - DMA

Along with the last word write, the core writes an entry to the nonperiodic request
queue
As soon as the nonperiodic queue becomes nonempty, the core attempts to send
an OUT token in the current frame
Write the second (last) packet for channel 1
The core generates the XFRC interrupt as soon as the last transaction is
completed successfully
In response to the XFRC interrupt, de-allocate the channel for other transfers
Handling nonACK responses
USB on-the-go high-speed (OTG_HS)
mode
RM0033 Rev 9
1211/1381
1260

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