Table 222. Important Tpiu Registers - ST STM32F207 Series Reference Manual

RM0033
32.17.7 Asynchronous mode
This is a low cost alternative to output the trace using only 1 pin: this is the asynchronous
output pin TRACESWO. Obviously there is a limited bandwidth.
TRACESWO is multiplexed with JTDO when using the SW-DP pin. This way, this
functionality is available in all STM32F20x and STM32F21x packages.
This asynchronous mode requires a constant frequency for TRACECLKIN. For the standard
UART (NRZ) capture mechanism, 5% accuracy is needed. The Manchester encoded
version is tolerant up to 10%.
32.17.8 TRACECLKIN connection inside the STM32F20x and STM32F21x
In the STM32F20x and STM32F21x, this TRACECLKIN input is internally connected to
HCLK. This means that when in asynchronous trace mode, the application is restricted to
use to time frames where the CPU frequency is stable.
Note: Important: when using asynchronous trace: it is important to be aware that:
The default clock of the STM32F20x and STM32F21x MCUs is the internal RC oscillator. Its
frequency under reset is different from the one after reset release. This is because the RC
calibration is the default one under system reset and is updated at each system reset
release.
Consequently, the trace port analyzer (TPA) should not enable the trace (with the
TRACE_IOEN bit) under system reset, because a Synchronization Frame Packet will be
issued with a different bit time than trace packets which will be transmitted after reset
release.
32.17.9 TPIU registers
The TPIU APB registers can be read and written only if the bit TRCENA of the Debug
Exception and Monitor Control register (DEMCR) is set. Otherwise, the registers are read as
zero (the output of this bit enables the PCLK of the TPIU).
Address Register
0xE0040004 Current port size
0xE00400F0 Selected pin protocol

Table 222. Important TPIU registers

Allows the trace port size to be selected:
Bit 0: Port size = 1
Bit 1: Port size = 2
Bit 2: Port size = 3, not supported
Bit 3: Port Size = 4
Only 1 bit must be set. By default, the port size is one bit. (0x00000001)
Allows the Trace Port Protocol to be selected:
Bit1:0=
00: Sync Trace Port Mode
01: Serial Wire Output - manchester (default value)
10: Serial Wire Output - NRZ
11: reserved
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Debug support (DBG)
Description
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