Block Diagram; Ahb Interface; Figure 397. Fsmc Block Diagram - ST STM32F207 Series Reference Manual

Flexible static memory controller (FSMC)
31.2

Block diagram

The FSMC consists of four main blocks:
•
The AHB interface (including the FSMC configuration registers)
• The NOR Flash/PSRAM controller
•
The NAND Flash/PC Card controller
• The external device interface
The block diagram is shown in
From clock
controller
HCLK
31.3

AHB interface

The AHB slave interface enables internal CPUs and other bus master peripherals to access
the external static memories.
AHB transactions are translated into the external device protocol. In particular, if the
selected external memory is 16 or 8 bits wide, 32-bit wide transactions on the AHB are split
into consecutive 16- or 8-bit accesses. The FSMC Chip Select (FSMC_NEx) does not
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Figure

Figure 397. FSMC block diagram

FSMC interrupt to NVIC
Configuration
registers
RM0033 Rev 9
397.
NOR/PSRAM
memory
controller
NAND/PC Card
memory
controller
FSMC_NE[4:1]
FSMC_NL (or NADV)
FSMC_NBL[1:0]
FSMC_CLK
FSMC_A[25:0]
FSMC_D[15:0]
FSMC_NOE
FSMC_NWE
FSMC_NWAIT
FSMC_NCE[3:2]
FSMC_INT[3:2]
FSMC_INTR
FSMC_NCE4_1
FSMC_NCE4_2
FSMC_NIORD
FSMC_NIOWR
FSMC_NREG
FSMC_CD
RM0033
NOR/PSRAM
signals
Shared
signals
NAND
signals
PC Card
signals
ai15591b