ST STM32F207 Series Reference Manual page 1326

Advanced arm-based 32-bit mcus
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Debug support (DBG)
32.6
ID codes and locking mechanism
There are several ID codes inside the STM32F20x and STM32F21x MCUs. ST strongly
recommends tools designers to lock their debuggers using the MCU DEVICE ID code
located in the external PPB memory map at address 0xE0042000.
32.6.1
MCU device ID code
The STM32F20x and STM32F21x MCUs integrate an MCU ID code. This ID identifies the
ST MCU part-number and the die revision. It is part of the DBG_MCU component and is
mapped on the external PPB bus (see
JTAG debug port (four to five pins) or the SW debug port (two pins) or by the user software.
It is even accessible while the MCU is under system reset.
Only the DEV_ID[11:0] should be used for identification by the debugger/programmer tools.
DBGMCU_IDCODE
Address: 0xE004 2000
Only 32-bits access supported. Read-only.
31
30
29
28
r
r
r
15
14
13
12
Reserved
Bits 31:16 REV_ID[15:0] Revision identifier
Bits 15:12 Reserved, must be kept at reset value.
Bits 11:0 DEV_ID[11:0]: Device identifier
32.6.2
Boundary scan TAP
JTAG ID code
The TAP of the STM32F20x and STM32F21x BSC (boundary scan) integrates a JTAG ID
code equal to 0x0BA00477.
1326/1381
27
26
25
r
r
r
r
11
10
9
r
r
r
This field indicates the revision of the device:
0x1000 = Revision A
0x1001 = Revision Z
0x2000 = Revision B
0x2001 = Revision Y
0x2003 = Revision X
0x2007 = Revision 1
0x200F = Revision V
0x201F = Revision 2 or 3
0x203F = Revision 4 or 5
The device ID is 0x411
Section
32.16). This code is accessible using the
24
23
22
REV_ID[15:0]
r
r
r
8
7
6
DEV_ID[11:0]
r
r
r
RM0033 Rev 9
21
20
19
18
r
r
r
r
5
4
3
2
r
r
r
r
RM0033
17
16
r
r
1
0
r
r

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