Flexible static memory controller (FSMC)
Mode 2/B - NOR Flash
1276/1381
Figure 403. Mode2 and mode B read accesses
A[25:0]
NADV
NEx
NOE
NWE
High
D[15:0]
HCLK cycles
Figure 404. Mode2 write accesses
A[25:0]
NADV
NEx
NOE
NWE
D[15:0]
HCLK cycles
RM0033 Rev 9
Memory transaction
ADDSET
Memory transaction
data driven by FSMC
ADDSET
data driven
by memory
DATAST
HCLK cycles
1HCLK
(DATAST + 1)
HCLK cycles
RM0033
ai15561
ai15562
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