Table 191. Fsmc_Btrx Bit Fields; Table 192. Fsmc_Bwtrx Bit Fields - ST STM32F207 Series Reference Manual

RM0033
Bit No.
3-2
1
0
Bit No.
31:30
29-28
27-24
23-20
19-16
15-8
7-4
3-0
Bit No.
31:30
29-28
27-24
23-20
19-16
15-8
7-4
3-0
Table 190. FSMC_BCRx bit fields (continued)
Bit name
MTYP[0:1]
MUXEN
MBKEN

Table 191. FSMC_BTRx bit fields

Bit name
Reserved 0x0
ACCMOD 0x3
DATLAT Don't care
CLKDIV Don't care
BUSTURN Time between NEx high to NEx low (BUSTURN HCLK)
Duration of the second access phase (DATAST HCLK cycles) for
DATAST
read accesses.
Duration of the middle phase of the read access (ADDHLD HCLK
ADDHLD
cycles)
Duration of the first access phase (ADDSET HCLK cycles) for read
ADDSET[3:0]
accesses. Minimum value for ADDSET is 1.

Table 192. FSMC_BWTRx bit fields

Bit name
Reserved 0x0
ACCMOD 0x3
DATLAT 0x0
CLKDIV 0x0
BUSTURN Time between NEx high to NEx low (BUSTURN HCLK)
DATAST Duration of the second access phase
Duration of the middle phase of the write access (ADDHLD HCLK
ADDHLD
cycles)
ADDSET[3:0] Duration of the first access phase . Minimum value for ADDSET is 1.
RM0033 Rev 9
Flexible static memory controller (FSMC)
As needed
0x0
0x1
Value to set
Value to set
Value to set
1283/1381
1318