Figure 419. Block Diagram Of Stm32 Mcu And Cortex - ST STM32F207 Series Reference Manual

Advanced arm-based 32-bit mcus
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RM0033
32
Debug support (DBG)
This section applies to the whole STM32F20x and STM32F21x family, unless otherwise
specified.
32.1
Overview
The STM32F20x and STM32F21x are built around a Cortex
hardware extensions for advanced debugging features. The debug extensions allow the
core to be stopped either on a given instruction fetch (breakpoint) or data access
(watchpoint). When stopped, the core's internal state and the system's external state may
be examined. Once examination is complete, the core and the system may be restored and
program execution resumed.
The debug features are used by the debugger host when connecting to and debugging the
STM32F20x and STM32F21x MCUs.
Two interfaces for debug are available:
Serial wire
JTAG debug port

Figure 419. Block diagram of STM32 MCU and Cortex

STM32F20x/STM32F21x debug support
Cortex-M3 debug support
JTMS/
SWDIO
JTDI
JTDO/
SWJ-DP
TRACESWO
NJTRST
JTCK/
SWCLK
Bus matrix
Data
Cortex-M3
core
AHB-AP
Internal private
peripheral bus (PPB)
RM0033 Rev 9
®
-M3 core which contains
®
-M3-level debug support
DCode
interface
System
interface
External private
peripheral bus (PPB)
TPIU
Bridge
NVIC
DWT
FPB
ITM
Debug support (DBG)
TRACESWO
Trace port
TRACECK
TRACED[3:0]
DBGMCU
ai17103
1319/1381
1349

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