Table 204. 16-Bit Pc-Card Signals And Access Type - ST STM32F207 Series Reference Manual

RM0033
transfers at even addresses: nCE1 will be asserted low, NCE2 will be asserted high
and only the even bytes will be valid.
•
Accesses to I/O Space can be performed either through AHB 8-bit or 16-bit accesses.
1 0 1 0
0 1 1 0
0 0 1 0
X 0 0 0
X 0 0 0
1 0 0 0
0 1 0 0
1 0 0 1
1 0 0 1
1 0 0 1
1 0 0 1
0 0 0 1
0 0 0 1
0 1 0 1
0 1 0 1
The FSMC Bank 4 gives access to those 3 memory spaces as described in
NAND/PC Card address mapping
Wait Feature
The CompactFlash Storage or PC Card may request the FSMC to extend the length of the
access phase programmed by MEMWAITx/ATTWAITx/IOWAITx bits, asserting the nWAIT
signal after nOE/nWE or nIORD/nIOWR activation if the wait feature is enabled through the
PWAITEN bit in the FSMC_PCRx register. In order to detect the nWAIT assertion correctly,
the MEMWAITx/ATTWAITx/IOWAITx bits must be programmed as follows:

Table 204. 16-bit PC-Card signals and access type

1 X X X-X X
1 X X X-X X
1 X X X-X 0
1 0 1 X-X 0
1 0 0 X-X 0
1 X X X-X 1
1 X X X-X x
0 X X X-X 0
0 X X X-X 1
0 X X X-X 0
0 X X X-X 1
0 X X X-X 0
0 X X X-X 0
0 X X X-X X
0 X X X-X X
Flexible static memory controller (FSMC)
Space Access Type
Read/Write byte on D7-D0
Common
Memory Read/Write byte on D15-D8
Space
Read/Write word on D15-D0
Read or Write Configuration
registers
Attribute
Space
Read or Write CIS (Card
Information Structure)
Invalid Read or Write (odd
address)
Attribute
Space
Invalid Read or Write (odd
address)
Read Even Byte on D7-0
Read Odd Byte on D7-0
Write Even Byte on D7-0
Write Odd Byte on D7-0
I/O space
Read Word on D15-0
Write word on D15-0
Read Odd Byte on D15-8
Write Odd Byte on D15-8
and Table 171: Memory mapping and timing
RM0033 Rev 9
Allowed/not
Allowed
YES
Not supported
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
Not supported
Not supported
Section 31.4.2:
registers.
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